The Xilinx Artix^®-7 family of FPGAs has redefined cost-sensitive solutions by cutting power consumption in half from the previous generation while providing advanced functionality for high-performance applications. Designers can leverage twice the logic density for the same power budget. These low-end devices are built on the 28 nm high-performance, low-power (HPL) process to deliver best-in-class performance-per-watt for products like portable medical equipment, military radios, and compact wireless infrastructure. Artix-7 FPGAs meet the needs of size, weight, power, and cost (SWaP-C) sensitive markets like avionics and communications.

Artix-7 FPGAs are available in -3, -2, -1, -1LI, and -2L speed grades, with -3 having the highest performance. The -1LI and -2L devices are screened for lower maximum static power and can operate at lower core voltages for lower dynamic power. The -1L1 devices operate only at V_CCINT = V_CCBRAM = 0.95 V and have the same speed specifications as the -1 speed grade. The -2L devices can operate at either of two V_CCINT voltages, 0.9 V and 1.0 V, and are screened for lower maximum static power. When operated at V_CCINT = 1.0 V, the speed specification of a -2L device is the same as the -2 speed grade. When operated at V_CCINT = 0.9 V, the -2L static and dynamic power is reduced.

Artix-7 FPGA DC and AC characteristics are specified in commercial, extended, industrial, expanded (-1Q), and military (-1M) temperature ranges. Except the operating temperature range or unless otherwise noted, all the DC and AC electrical parameters are the same for a particular speed grade (that is, the timing characteristics of a -1M speed grade military device are the same as for a -1C speed grade commercial device). However, only selected speed grades and/or devices are available in each temperature range. For example, -1M is only available in the defense-grade Artix-7Q family and -1Q is only available in XA Artix-7 FPGAs.

Features
Leading system performance-per-watt for cost-sensitive applications Lowest total power per logic cell Best-in-class performance for DDR3, DSP, parallel and serial I/O Low-cost, small-footprint packaging Part of a broad cost-effective all-programmable low-end portfolio Programmable system integration Up to 215 K LCs; AXI IP and analog mixed signal integration Increased system performance Up to 16 x 6.6G GTs, 930 GMAC/s, 13Mb BRAM, 1.2Gb/s LVDS, DDR3-1066		BOM cost-reduction Small wire-bond packaging and analog component savings Total power reduction 65% lower static and 50% lower power than 45 nm generation devices Accelerated design productivity Scalable optimized architecture, comprehensive tools, and IP
Applications
Low-cost ultrasound Wireless backhaul Artix-7 solution Multi-protocol machine-vision cameras		Programmable logic controllers Small form-factor and battery-powered software-defined radios