AD6684BCPZRL7-500

AD6684BCPZRL7-500
Mfr. #:
AD6684BCPZRL7-500
Fabricante:
Analog Devices Inc.
Descripción:
RF Receiver 0.975V/1.8V/2.5V 72-Pin LFCSP EP T/R
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
AD6684BCPZRL7-500 Ficha de datos
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AD6684BCPZRL7-500 más información AD6684BCPZRL7-500 Product Details
Atributo del producto
Valor de atributo
Tags
AD6684, AD668, AD66, AD6
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
RF Receiver 0.975V/1.8V/2.5V 72-Pin LFCSP EP T/R
***ark
135 Mhz Bw Quad Receiver
***hardson RFPD
CONVERTER - ADC
***log Devices
The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz. The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package. The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters. Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution. Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution. With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures. Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup). In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, SYNCINB±AB, and SYNCINB±CD input pins. The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI. The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the −40°C to +105°C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management. Applications Communications Diversity multiband, multimode digital receivers 3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios
AD6684 135MHz Quad IF Receivers
Analog Devices Inc. AD6684 135MHz Quad IF Receivers consists of four 14-bit, 500MSPS ADCs and multiple digital processing blocks. The digital processing blocks include four wideband DDCs, an NSR, and VDR monitoring. 
RF, Microwave & Millimeter Wave ADI SLP
Broadband ADI SLP
Parte # Mfg. Descripción Valores Precio
AD6684BCPZRL7-500
DISTI # V36:1790_16600951
Analog Devices IncRF Receiver 0.975V/1.8V/2.5V 72-Pin LFCSP EP T/R0
  • 400000:$583.4300
  • 200000:$583.4500
  • 40000:$588.7900
  • 4000:$603.4800
  • 400:$606.3000
AD6684BCPZRL7-500
DISTI # AD6684BCPZRL7-500-ND
Analog Devices Inc135 MHZ BW QUAD RECEIVER
RoHS: Compliant
Min Qty: 400
Container: Tape & Reel (TR)
Temporarily Out of Stock
  • 400:$606.3030
AD6684BCPZ-500
DISTI # 584-AD6684BCPZ-500
Analog Devices IncRF Receiver 135 MHz BW Quad reciever
RoHS: Compliant
0
  • 1:$621.2000
  • 5:$612.6100
AD6684BCPZRL7-500
DISTI # 584-AD6684BCPZRL7500
Analog Devices IncRF Receiver 135 MHz BW Quad receiver
RoHS: Compliant
0
  • 400:$612.6100
AD6684BCPZRL7-500
DISTI # AD6684BCPZRL750
Analog Devices IncCONVERTER - ADC
RoHS: Compliant
0
  • 400:$637.8200
Imagen Parte # Descripción
AD6684BCPZ-500

Mfr.#: AD6684BCPZ-500

OMO.#: OMO-AD6684BCPZ-500

RF Receiver 135 MHz BW Quad reciever
AD6684BCPZRL7-500

Mfr.#: AD6684BCPZRL7-500

OMO.#: OMO-AD6684BCPZRL7-500

RF Receiver 135 MHz BW Quad receiver
AD6684BCPZ-500

Mfr.#: AD6684BCPZ-500

OMO.#: OMO-AD6684BCPZ-500-ANALOG-DEVICES

RF QUAD RECEIVER 135MHZ 72LFCSP
AD6684BCPZRL7-500

Mfr.#: AD6684BCPZRL7-500

OMO.#: OMO-AD6684BCPZRL7-500-ANALOG-DEVICES

RF Receiver 0.975V/1.8V/2.5V 72-Pin LFCSP EP T/R
Disponibilidad
Valores:
Available
En orden:
4500
Ingrese la cantidad:
El precio actual de AD6684BCPZRL7-500 es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
Precio de referencia (USD)
Cantidad
Precio unitario
Ext. Precio
1
918,92 US$
918,92 US$
10
872,97 US$
8 729,69 US$
100
827,02 US$
82 702,35 US$
500
781,08 US$
390 538,90 US$
1000
735,13 US$
735 132,00 US$
Debido a la escasez de semiconductores a partir de 2021, el precio inferior es el precio normal antes de 2021. Envíe una consulta para confirmar.
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