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| PartNumber | AM3354BZCE60 | AM3354BZCE30 | AM3354BZCEA30 |
| Description | IC MPU SITARA 600MHZ 298NFBGA Sitara | IC MPU SITARA 300MHZ 298NFBGA Sitara | IC MPU SITARA 300MHZ 298NFBGA Sitara |
| Manufacturer | Texas Instruments | Texas Instruments | - |
| Product Category | Embedded - Microprocessors | Embedded - Microprocessors | - |
| Series | Sitara | Sitara | - |
| Packaging | Tray | Tube | - |
| Mounting Style | SMD/SMT | - | - |
| Tradename | Sitara | - | - |
| Package Case | PBGA-298 | 298-LFBGA | - |
| Operating Temperature | 0°C ~ 90°C (TJ) | 0°C ~ 90°C (TJ) | - |
| Supplier Device Package | 298-NFBGA (13x13) | 298-NFBGA (13x13) | - |
| Memory Type | L1/L2/L3 Cache RAM ROM | - | - |
| Voltage I O | 1.8V, 3.3V | 1.8V, 3.3V | - |
| Speed | 600MHz | 300MHz | - |
| Core Processor | ARMR CortexR-A8 | ARMR CortexR-A8 | - |
| Number of Cores Bus Width | 1 Core, 32-Bit | 1 Core, 32-Bit | - |
| Co Processors DSP | Multimedia; NEON SIMD | Multimedia; NEON SIMD | - |
| RAM Controllers | LPDDR, DDR2, DDR3, DDR3L | LPDDR, DDR2, DDR3, DDR3L | - |
| Graphics Acceleration | Yes | Yes | - |
| Display & Interface Controllers | LCD, Touchscreen | LCD, Touchscreen | - |
| Ethernet | 10/100/1000 Mbps (2) | 10/100/1000 Mbps (2) | - |
| SATA | - | - | - |
| USB | USB 2.0 + PHY (2) | USB 2.0 + PHY (2) | - |
| Security Features | Cryptography, Random Number Generator | Cryptography, Random Number Generator | - |
| Number of Cores | 1 Core | - | - |
| Maximum Operating Temperature | + 90 C | - | - |
| Minimum Operating Temperature | 0 C | - | - |
| Operating Supply Voltage | 1.1 V | - | - |
| Interface Type | CAN Ethernet I2C SPI UART USB | - | - |
| Core | ARM Cortex A8 | - | - |
| Processor Series | Sitara | - | - |
| Development Kit | TMDXEVM3358 | - | - |
| Data Bus Width | 32 bit | - | - |
| Maximum Clock Frequency | 600 MHz | - | - |
| L1 Cache Instruction Memory | 32 kB | - | - |
| L1 Cache Data Memory | 32 kB | - | - |
| Data RAM Size | 64 kB 64 kB | - | - |
| Data ROM Size | 176 kB | - | - |
| I O Voltage | 1.8 V 3.3 V | - | - |
| L2 Cache Instruction Data Memory | 256 kB | - | - |
| Number of Timers Counters | 8 x 32 bit | - | - |
| Watchdog Timers | Watchdog Timer | - | - |