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SN74LVC823ADWRG4

SN74LVC823ADWRG4
Mfr. #:
SN74LVC823ADWRG4
Descripción:
IC FF D-TYPE SNGL 9BIT 20SOIC
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
SN74LVC823ADWRG4 Ficha de datos
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SN74LVC823ADWRG4 más información SN74LVC823ADWRG4 Product Details
Atributo del producto
Valor de atributo
Tags
SN74LVC823ADWR, SN74LVC823ADW, SN74LVC823AD, SN74LVC823, SN74LVC82, SN74LVC8, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 24SOIC
***as Instruments
This 9-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC823A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. With the clock-enable (CLKEN)\ input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR)\ input low causes the nine Q outputs to go low, independently of the clock. A buffered output-enable (OE)\ input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or the high-impedance state. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Parte # Descripción Valores Precio
SN74LVC823ADWRG4
DISTI # SN74LVC823ADWRG4-ND		IC FF D-TYPE SNGL 9BIT 20SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Limited Supply - Call
    SN74LVC823ADWRG4
    DISTI # 595-SN74LVC823ADWRG4    		Flip Flops 9B Bus Interface FlipFlop
    RoHS: Compliant    		0
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      Disponibilidad
      Valores:
      Available
      En orden:
      2000
      Ingrese la cantidad:
      El precio actual de SN74LVC823ADWRG4 es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
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      Debido a la escasez de semiconductores a partir de 2021, el precio inferior es el precio normal antes de 2021. Envíe una consulta para confirmar.
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