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SN74ALVCH162835DLR

SN74ALVCH162835DLR
Mfr. #:
SN74ALVCH162835DLR
Descripción:
IC UNIV BUS DVR 18BIT 56SSOP
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
SN74ALVCH162835DLR Ficha de datos
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SN74ALVCH162835DLR más información SN74ALVCH162835DLR Product Details
Atributo del producto
Valor de atributo
Fabricante
Instrumentos Texas
categoria de producto
Lógica: funciones de bus universal
Serie
74ALVCH
embalaje
Tape & Reel (TR)
Paquete-Estuche
56-BSSOP (0.295", 7.50mm Width)
Temperatura de funcionamiento
-40°C ~ 85°C
Tipo de montaje
Montaje superficial
Suministro de voltaje
1.65 V ~ 3.6 V
Paquete de dispositivo de proveedor
56-SSOP
Número de circuitos
18-Bit
Número de entradas
-
Salida de corriente alta-baja
12mA, 12mA
Tipo de lógica
Conductor de autobús universal
Tags
SN74ALVCH162835, SN74ALVCH16283, SN74ALVCH1628, SN74ALVCH162, SN74ALVCH1, SN74ALVCH, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 18BIT 56SSOP
***as Instruments
This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162835 is characterized for operation from –40C to 85C.
Parte # Descripción Valores Precio
SN74ALVCH162835DLR
DISTI # SN74ALVCH162835DLR-ND		IC UNIV BUS DVR 18BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    SN74ALVCH162835DLR
    DISTI # 595-SN74ALVCH162835D    		Bus Transceivers 18-Bit Univ Bus Drv With 3-State Outputs
    RoHS: Compliant    		0
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      Disponibilidad
      Valores:
      Available
      En orden:
      2000
      Ingrese la cantidad:
      El precio actual de SN74ALVCH162835DLR es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
      Precio de referencia (USD)
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      0,00 US$
      10
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      100
      0,00 US$
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      500
      0,00 US$
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      1000
      0,00 US$
      0,00 US$
      Debido a la escasez de semiconductores a partir de 2021, el precio inferior es el precio normal antes de 2021. Envíe una consulta para confirmar.
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