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OMAPL132EZWTA2E

OMAPL132EZWTA2E
Mfr. #:
OMAPL132EZWTA2E
Descripción:
Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
OMAPL132EZWTA2E Ficha de datos
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Más información:
OMAPL132EZWTA2E más información OMAPL132EZWTA2E Product Details
Atributo del producto
Valor de atributo
Fabricante:
Instrumentos Texas
Categoria de producto:
Procesadores y controladores de señales digitales: DSP, DSC
Estilo de montaje:
SMD / SMT
Paquete / Caja:
NFBGA-361
Serie:
OMAP-L132
Temperatura mínima de funcionamiento:
- 40 C
Temperatura máxima de funcionamiento:
+ 105 C
Altura:
1.4 mm
Longitud:
16 mm
Ancho:
16 mm
Marca:
Instrumentos Texas
Sensible a la humedad:
Yes
Tipo de producto:
DSP - Procesadores y controladores de señales digitales
Cantidad de paquete de fábrica:
90
Subcategoría:
Procesadores y controladores integrados
Nombre comercial:
OMAP
Unidad de peso:
0.027845 oz
Tags
OMAPL132EZWTA, OMAPL132E, OMAPL132, OMAPL1, OMAPL, OMAP, OMA
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et
DSP Fixed-Point/Floating-Point 32-Bit 200MHz 1600MIPS 361-Pin NFBGA Tray
***as Instruments
C674x DSP+Arm Processor - 200MHz 361-NFBGA -40 to 105
***i-Key
IC MPU OMAP-L1X 200MHZ 361NFBGA
***ark
Omapl132ezwta2e Freon 2.3
***ASIN
The OMAP-L132 C6000 DSP+ARM processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.
***AS USD
The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.
***ASI
The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer (RISC) technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core.
***AS INST
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
***AS INST
The ARM9 core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM9 core has separate 16-KB instruction and 16-KB data caches. Both caches are 4-way associative with virtual index virtual tag (VIVT). The ARM9 core also has 8KB of RAM (Vector Table) and 64KB of ROM.
***AS INTRUMENTS
The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a 32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by the ARM9 and other hosts in the system, an additional 128KB of RAM shared memory is available for use by other hosts without affecting DSP performance.
***AS USD
For security-enabled devices, TI’s Basic Secure Boot lets users protect proprietary intellectual property and prevents external entities from modifying user-developed algorithms. By starting from a hardware-based “root-of-trust," the secure boot flow ensures a known good starting point for code execution. By default, the JTAG port is locked down to prevent emulation and debug attacks; however, the JTAG port can be enabled during the secure boot process during application development. The boot modules are encrypted while sitting in external nonvolatile memory, such as flash or EEPROM, and are decrypted and authenticated when loaded during secure boot. Encryption and decryption protects customers’ IP and lets them securely set up the system and begin device operation with known, trusted code.
***AS INSTR
Basic Secure Boot uses either SHA-1 or SHA-256, and AES-128 for boot image validation. Basic Secure Boot also uses AES-128 for boot image encryption. The secure boot flow employs a multilayer encryption scheme which not only protects the boot process but also offers the ability to securely upgrade boot and application software code. A 128-bit device-specific cipher key, known only to the device and generated using a NIST-800-22 certified random number generator, is used to protect customer encryption keys. When an update is needed, the customer creates a new encrypted image. Then the device can acquire the image through an external interface, such as Ethernet, and overwrite the existing code. For more details on the supported security features or TI’s Basic Secure Boot, see the .
***AS INSRUMENTS
The peripheral set includes: a 10/100 Mbps Ethernet media access controller (EMAC) with a management data input/output (MDIO) module; one USB2.0 OTG interface; two I2C Bus interfaces; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; two multichannel buffered serial ports (McBSPs) with FIFO buffers; two serial peripheral interfaces (SPIs) with multiple chip selects; four 64-bit general-purpose timers each configurable (one configurable as a watchdog); a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; three UART interfaces (each with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.
***AS INSTRUMENT
The EMAC provides an efficient interface between the device and a network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration. The EMAC supports both MII and RMII interfaces.
***AS INSTRUMENT
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.
***NS
The device has a complete set of development tools for the ARM9 and DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
OMAP-L132 C6-Integra™ DSP+ARM® Processor
OMO Electronic OMAP-L132 C6-Integra™ DSP+ARM® Processor low-power applications processor is based on an ARM926EJ-S™ and C674x DSP core. This TI applications processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs (digital signal processors). OMAP-L132 is a fully integrated mixed processor solution with a dual-core architecture that provides benefits of both DSP and RISC technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core. The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-bit, 16-bit, or 8-bit data. The device DSP core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 32KB direct mapped cache and the Level 1 data cache (L1D) is a 32KB 2-way set-associative cache. The Level 2 program cache (L2P) consists of a 256KB memory space that is shared between program and data space.Learn More
Processors
OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.
Parte # Descripción Valores Precio
OMAPL132EZWTA2E
DISTI # OMAPL132EZWTA2E-ND		IC MPU OMAP-L1X 200MHZ 361NFBGA
RoHS: Compliant
Min Qty: 90
Container: Tray		Temporarily Out of Stock
  • 90:$17.4641
OMAPL132EZWTA2E
DISTI # OMAPL132EZWTA2E		DSP Fixed-Point/Floating-Point 32-Bit 200MHz 1600MIPS 361-Pin NFBGA Tray - Trays (Alt: OMAPL132EZWTA2E)
RoHS: Compliant
Min Qty: 90
Container: Tray		Americas - 0
  • 90:$17.0900
  • 180:$16.6900
  • 360:$15.9900
  • 540:$15.5900
  • 900:$15.3900
OMAPL132EZWTA2E
DISTI # 595-OMAPL132EZWTA2E		Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
RoHS: Compliant		80
  • 1:$19.8300
  • 5:$19.0100
  • 10:$18.2900
  • 25:$17.4700
  • 100:$15.6200
  • 250:$14.9000
  • 500:$14.1800
Imagen Parte # Descripción
TMDSLCDK138

Mfr.#: TMDSLCDK138

OMO.#: OMO-TMDSLCDK138

 Video IC Development Tools Freon EVM
TMDSEMU560V2STM-UE

Mfr.#: TMDSEMU560V2STM-UE

OMO.#: OMO-TMDSEMU560V2STM-UE

 Emulators / Simulators XDS560 Class High Speed Emulators
TMDSEMU200-U

Mfr.#: TMDSEMU200-U

OMO.#: OMO-TMDSEMU200-U-TEXAS-INSTRUMENTS

 XDS200 USB JTAG EMULATOR
TMDSEMU560V2STM-U

Mfr.#: TMDSEMU560V2STM-U

OMO.#: OMO-TMDSEMU560V2STM-U-TEXAS-INSTRUMENTS

 EMULATOR TRACE SYSTEM USB
TMDSEMU560V2STM-UE

Mfr.#: TMDSEMU560V2STM-UE

OMO.#: OMO-TMDSEMU560V2STM-UE-TEXAS-INSTRUMENTS

 EMULATOR TRACE SYSTEM XDS560
TMDSLCDK138

Mfr.#: TMDSLCDK138

OMO.#: OMO-TMDSLCDK138-TEXAS-INSTRUMENTS

 OMAP-L138 EVAL BRD
TMDSLCDK6748

Mfr.#: TMDSLCDK6748

OMO.#: OMO-TMDSLCDK6748-TEXAS-INSTRUMENTS

 TMS320C6748 EVAL BRD
Disponibilidad
Valores:
80
En orden:
2063
Ingrese la cantidad:
El precio actual de OMAPL132EZWTA2E es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
Precio de referencia (USD)
Cantidad
Precio unitario
Ext. Precio
1
19,83 US$
19,83 US$
5
19,01 US$
95,05 US$
10
18,29 US$
182,90 US$
25
17,47 US$
436,75 US$
100
15,62 US$
1 562,00 US$
250
14,90 US$
3 725,00 US$
500
14,18 US$
7 090,00 US$
Debido a la escasez de semiconductores a partir de 2021, el precio inferior es el precio normal antes de 2021. Envíe una consulta para confirmar.
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