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SN74LVC841ADWRE4

SN74LVC841ADWRE4
Mfr. #:
SN74LVC841ADWRE4
Descripción:
IC 10BIT BUS INT D LATCH 24-SOIC
Ciclo vital:
Nuevo de este fabricante.
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SN74LVC841ADWRE4 Ficha de datos
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SN74LVC841ADWRE4 más información SN74LVC841ADWRE4 Product Details
Atributo del producto
Valor de atributo
Tags
SN74LVC841ADWR, SN74LVC841ADW, SN74LVC841AD, SN74LVC841A, SN74LVC84, SN74LVC8, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC 10BIT BUS INT D LATCH 24-SOIC
***eco
10-BIT D-TYPE LATCH WITH 3-STATE<AZ
***as Instruments
This 10-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC841A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. A buffered output-enable (OE)\ input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Parte # Descripción Valores Precio
SN74LVC841ADWRE4
DISTI # SN74LVC841ADWRE4-ND		IC 10BIT BUS INT D LATCH 24-SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Limited Supply - Call
    SN74LVC841ADWRE4
    DISTI # 595-SN74LVC841ADWRE4    		Latches 10B Bus Interface DType Latch
    RoHS: Compliant    		0
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      Disponibilidad
      Valores:
      Available
      En orden:
      5000
      Ingrese la cantidad:
      El precio actual de SN74LVC841ADWRE4 es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
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      Debido a la escasez de semiconductores a partir de 2021, el precio inferior es el precio normal antes de 2021. Envíe una consulta para confirmar.
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