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SN74ABT651NSR

SN74ABT651NSR
Mfr. #:
SN74ABT651NSR
Descripción:
Bus Transceivers Octal Bus Trncvr/Reg W/3-State Otpt
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
SN74ABT651NSR Ficha de datos
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Más información:
SN74ABT651NSR más información SN74ABT651NSR Product Details
Atributo del producto
Valor de atributo
Fabricante:
Instrumentos Texas
Categoria de producto:
Transceptores de bus
RoHS:
Y
Familia lógica:
74ABT
Nivel de entrada:
TTL
Nivel de salida:
TTL
Tipo de salida:
3-State
Corriente de salida de alto nivel:
- 32 mA
Corriente de salida de nivel bajo:
64 mA
Tiempo de retardo de propagación:
5.1 ns
Voltaje de suministro - Máx:
5.5 V
Voltaje de suministro - Min:
4.5 V
Temperatura mínima de funcionamiento:
- 40 C
Temperatura máxima de funcionamiento:
+ 85 C
Paquete / Caja:
SO-24
Embalaje:
Carrete
Función:
Registro / transceptor de bus
Altura:
1.95 mm
Longitud:
15 mm
Numero de circuitos:
8
Producto:
BiCMOS
Tecnología:
BiCMOS
Ancho:
5.3 mm
Marca:
Instrumentos Texas
Estilo de montaje:
SMD / SMT
Número de canales:
8
Corriente de suministro - Máx .:
30 mA
Voltaje de suministro operativo:
4.5 V to 5.5 V
Polaridad:
Invertir
Tipo de producto:
Transceptores de bus
Cantidad de paquete de fábrica:
1
Subcategoría:
Circuitos integrados lógicos
Tipo de activación:
Borde positivo
Unidad de peso:
0.010857 oz
Tags
SN74ABT651N, SN74ABT651, SN74ABT65, SN74ABT6, SN74AB, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Registered Bus Transceiver, ABT Series, 1-Func, 8-Bit, Inverted Output, BICMOS, PDSO24
***i-Key
IC BUS TRANSCEIVER DUAL 24SO
***ource
IC TRANSCVR INVERT 5.5V 24SO
***el Nordic
Contact for details
***as Instruments
These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'ABT651 devices. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA\. In this configuration, each output reinforces its input. When all the other data sources to the two sets of bus lines are at high impedance, each set remains at its last state. To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (A to B). The SN54ABT651 is characterized for operation over the full military temperature range of -55C to 125C. The SN74ABT651 is characterized for operation from -40C to 85C. The data output functions may be enabled or disabled by a variety of level combinations at OEAB or OEBA\. Data input functions are always enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs. When select control is low, clocks can occur simultaneously if allowances are made for propagation delays from A to B (B to A) plus setup and hold times. When select control is high, clocks must be staggered to load both registers. Figure 1. Bus-Management Functions
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Disponibilidad
Valores:
Available
En orden:
4500
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