SN74ALVCH16903DLR

SN74ALVCH16903DLR
Mfr. #:
SN74ALVCH16903DLR
Descripción:
Bus Transceivers 16-Bit Bus Trnscvrs With 3-State Outputs
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
SN74ALVCH16903DLR Ficha de datos
Entrega:
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Pago:
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ECAD Model:
Más información:
SN74ALVCH16903DLR más información SN74ALVCH16903DLR Product Details
Atributo del producto
Valor de atributo
Fabricante:
Instrumentos Texas
Categoria de producto:
Transceptores de bus
RoHS:
Y
Familia lógica:
ALVC
Nivel de entrada:
LVTTL
Nivel de salida:
LVTTL
Tipo de salida:
3-State
Corriente de salida de alto nivel:
- 24 mA
Corriente de salida de nivel bajo:
24 mA
Tiempo de retardo de propagación:
6.1 ns
Voltaje de suministro - Máx:
3.6 V
Voltaje de suministro - Min:
2.3 V
Temperatura mínima de funcionamiento:
0 C
Temperatura máxima de funcionamiento:
+ 70 C
Paquete / Caja:
SSOP-56
Embalaje:
Carrete
Función:
Transceptor de bus / Registro con verificador de paridad
Altura:
2.59 mm
Longitud:
18.41 mm
Numero de circuitos:
1
Producto:
CMOS
Tecnología:
CMOS
Ancho:
7.49 mm
Marca:
Instrumentos Texas
Estilo de montaje:
SMD / SMT
Número de canales:
12
Corriente de suministro - Máx .:
40 uA
Voltaje de suministro operativo:
2.5 V, 3.3 V
Polaridad:
No inversor
Tipo de producto:
Transceptores de bus
Cantidad de paquete de fábrica:
1
Subcategoría:
Circuitos integrados lógicos
Tipo de activación:
Borde positivo
Unidad de peso:
0.024508 oz
Tags
SN74ALVCH16903, SN74ALVCH1690, SN74ALVCH169, SN74ALVCH1, SN74ALVCH, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 12BIT 56SSOP
***as Instruments
This 12-bit universal bus driver is designed for 2.3-V to 3.6-V VCC operation. The SN74ALVCH16903 has dual outputs and can operate as a buffer or an edge-triggered register. In both modes, parity is checked on APAR, which arrives one cycle after the data to which it applies. The YERR\ output, which is produced one cycle after APAR, is open drain. MODE selects one of the two data paths. When MODE is low, the device operates as an edge-triggered register. On the positive transition of the clock (CLK) input and when the clock-enable (CLKEN\) input is low, data set up at the A inputs is stored in the internal registers. On the positive transition of CLK and when CLKEN\ is high, only data set up at the 9A-12A inputs is stored in their internal registers. When MODE is high, the device operates as a buffer and data at the A inputs passes directly to the outputs. 11A/YERREN\ serves a dual purpose; it acts as a normal data bit and also enables YERR\ data to be clocked into the YERR\ output register. When used as a single device, parity output enable (PAROE\) must be tied high; when parity input/output (PARI/O) is low, even parity is selected and when PARI/O is high, odd parity is selected. When used in pairs and PAROE\ is low, the parity sum is output on PARI/O for cascading to the second SN74ALVCH16903. When used in pairs and PAROE\ is high, PARI/O accepts a partial parity sum from the first SN74ALVCH16903. A buffered output-enable (OE\) input can be used to place the 24 outputs and YERR\ in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operation of the device. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH16903 is characterized for operation from 0C to 70C.
Parte # Descripción Valores Precio
SN74ALVCH16903DLR
DISTI # SN74ALVCH16903DLR-ND
IC UNIV BUS DVR 12BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74ALVCH16903DLR
    DISTI # 595-SN74ALVCH16903LR
    Bus Transceivers 16-Bit Bus Trnscvrs With 3-State Outputs
    RoHS: Compliant
    0
      SN74ALVCH16903DLRBus Driver, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56
      RoHS: Compliant
      1000
      • 1000:$16.0500
      • 500:$16.9000
      • 100:$17.5900
      • 25:$18.3500
      • 1:$19.7600
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      Disponibilidad
      Valores:
      Available
      En orden:
      5500
      Ingrese la cantidad:
      El precio actual de SN74ALVCH16903DLR es solo de referencia, si desea obtener el mejor precio, envíe una consulta o envíe un correo electrónico directo a nuestro equipo de ventas [email protected]
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