MC100E431FNG

MC100E431FNG
Mfr. #:
MC100E431FNG
Fabricante:
ON Semiconductor
Descripción:
Flip Flops 5V ECL 3-Bit Differential
Ciclo vital:
Nuevo de este fabricante.
Ficha de datos:
MC100E431FNG Ficha de datos
Entrega:
DHL FedEx Ups TNT EMS
Pago:
T/T Paypal Visa MoneyGram Western Union
HTML Datasheet:
MC100E431FNG DatasheetMC100E431FNG Datasheet (P4-P6)MC100E431FNG Datasheet (P7-P9)
ECAD Model:
Atributo del producto
Valor de atributo
Fabricante:
EN Semiconductor
Categoria de producto:
Chancletas
RoHS:
Y
Numero de circuitos:
3
Familia lógica:
100
Tipo de lógica:
Chanclas
Polaridad:
Invertir / No Invertir
Tipo de entrada:
Serie / Paralelo
Tipo de salida:
Diferencial
Tiempo de retardo de propagación:
0.85 ns
Voltaje de suministro - Min:
+/- 4.2 V
Voltaje de suministro - Máx:
+/- 5.7 V
Temperatura mínima de funcionamiento:
0 C
Temperatura máxima de funcionamiento:
+ 85 C
Estilo de montaje:
SMD / SMT
Paquete / Caja:
PLCC-28
Embalaje:
Tubo
Función:
Tipo D
Altura:
3.69 mm
Longitud:
11.58 mm
Ancho:
11.58 mm
Marca:
EN Semiconductor
Número de canales:
3
Número de líneas de entrada:
3
Número de líneas de salida:
3
Voltaje de suministro operativo:
4.2 V to 5.7 V
Tipo de producto:
Chancletas
Tipo de reinicio:
Establecer, restablecer
Cantidad de paquete de fábrica:
37
Subcategoría:
Circuitos integrados lógicos
Unidad de peso:
0.041719 oz
Tags
MC100E43, MC100E4, MC100E, MC100, MC10, MC1
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG TRPL 28PLCC
***th Star Micro
The MC10E/100E431 is a 3-bit flip-flop with differential clock data input and data output. The asynchronous Set and Reset controls are edge-triggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset). The E431 is also designed with larger internal swings an approach intended to minimize the time spent crossing the threshold region and thus reduce the metastability susceptibility window. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the Dbar and the CLKbar sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5 V below VCC. The 100 Series contains temperature compensation. The VBB pin an internally generated voltage supply is available to this device only. For single-ended input conditions the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used VBB should be left open.
Parte # Mfg. Descripción Valores Precio
MC100E431FNG
DISTI # MC100E431FNG-ND
ON SemiconductorIC FF D-TYPE TRPL 1BIT 28PLCC
RoHS: Compliant
Min Qty: 74
Container: Tube
Limited Supply - Call
    MC100E431FNG
    DISTI # 863-MC100E431FNG
    ON SemiconductorFlip Flops 5V ECL 3-Bit Differential
    RoHS: Compliant
    0
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      Disponibilidad
      Valores:
      Available
      En orden:
      1500
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